| 1. |
Cell site gateways support TDM/ATM Pseudowire capacity to fulfill both 2G/3G backhaul requirements. |
| 2. |
Support 8 E1 ports configurations. |
| 3. |
ATM Capabilities:
| – |
Inverse Multiplex over ATM (IMA) 1.0/1.1 support |
| – |
IMA Group Member can support up to 8 E1 ports |
| – |
ATM VPC/VCC support |
| – |
ATM OAM for end-to-end diagnosis |
|
| 4.. |
ATM PW Capabilities:
| – |
Support N:1 mode |
| – |
Support per ATM VPC/VCC mode |
| – |
Programmable ATM Cells per ATM PW frame with different Timeout value |
| – |
Support Up to 16 ATM PW connections |
| – |
Support Up to 16 ATM PW connections |
|
| 5. |
TDM PW Capabilities:
| – |
Support up to 4 E1 port (#5 ~ #8) with TDM CES capacity |
| – |
E1 CESoPSN for structured TDM traffic |
| – |
E1 SAToP for unstructured TDM traffic |
|
| 6. |
TDM AAL1 PW Capability (Option):
| – |
Support up to 4 E1 ports (#5 ~ #8) with TDM over AAL1 |
|
| 7. |
PSN Capability:
|
| 8. |
Fault/QOS Handling
| – |
Alarm forwarding between the PSN and TDM/ATM ports. |
| – |
BFD Session can be associated with each ATM PW for PSN fault detection. |
| – |
QOS support for VLAN EXP Bit tagging or IP TOS/DSCP field programming |
|
| 9. |
Full OAM according to ITU-T I.610 requirements:
| – |
F4 and F5 OAM |
| – |
Configurable OAM mode per connection point |
| – |
AIS and RDI cell detection and generation upon physical layer and ATM layer failure |
| – |
CC cell generation and LOC state detection per VP/VC |
| – |
Loopback location ID |
| – |
Configurable loopback source ID per device |
| – |
BFD, VCCV |
|
| 10. |
PW packets out-of-sequence detection |
| 11. |
Lost packet compensation for CES |
| 12. |
Configurable jitter buffer |
| 13. |
Management Capabilities:
| – |
RS-232 console |
| – |
Inband/Out-of-band Telnet/SNMP based management scheme |
|
| 14. |
Timing source selectable, hitless to service. |
| 15. |
Timing accuracy and stability:
| – |
option (1) Standard (for Business-services, Jitter/Wander meets G.823/824 requirements) |
| – |
option (2): for Wireless backhaul applications, meets 3GPP TS25.104 and ETSI TS 125 402 |
|
| 16. |
Following timing modes are supported for ATM PW
| – |
Internal: A Free-running clock will be generate for IMA/E1 |
| – |
Loopback: Clock derived from the received clock of the IMA E1 ports |
| – |
External: Clock derived from the received clock of the Built-in Timing System (BITS) port |
| – |
etwork: Clock derived from a Timing Server across PSN |
|
| 17. |
Following timing modes are supported for TDM PW
| – |
Adaptive: Clock derived from the received Buffer status |
| – |
Loopback: Clock derived from the received clock of the receive T1/E1 ports |
| – |
External: Clock derived from the received clock of the BITS port |
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